MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor)

A MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a semiconductor device that uses an electric field to control the flow of current between its drain and source terminals, with the gate terminal controlling the conductivity. It functions as a highly efficient electronic switch or amplifier, with its most common applications being in integrated circuits like microprocessors and memories, and in power applications.

How a MOSFET Works:

Gate Voltage: A voltage applied to the gate terminal creates an electric field that controls the current flow between the drain and source.

Insulated Gate: The gate is insulated by a thin layer of metal oxide, making it act like a capacitor and giving the MOSFET a very high input resistance.

Channel Control: This electric field alters the conductivity of the semiconductor channel, allowing or restricting current to pass

Key Characteristics & Types

N-type and P-type: MOSFETs are classified by the polarity of their channel.

Enhancement vs. Depletion: They also come in enhancement types (normally off) and depletion types (normally on)

MOSFETs vs. BJTs: MOSFETs offer advantages such as high-speed and low-loss operation compared to some other transistor types like Bipolar Junction Transistors (BJTs).

Applications

Digital Circuits: They are the most common component in integrated circuits.

Power Electronics: Larger MOSFETs are used for high-power switching applications in power supplies and inverters.

Amplification: Their ability to change conductivity makes them ideal for amplifying electronic signals

(From AI Overview by Google)

Operation of MOSFET's

(From https://www.allaboutcircuits.com/technical-articles/mosfet-channel-length-modulation/)

(Note: This section simplifies the discussion by addressing only NMOS transistors; the information applies to PMOS devices as well, with the typical modifications, e.g., V_TH is negative, V_GS < V_TH to leave the cutoff region, µ_p instead of µ_n.)

Operating Modes

Analysis of MOSFET circuits is based on three possible operating modes: cutoff, triode (aka linear), and saturation. (The subthreshold region is a fourth mode, but we don't need to worry about that as yet.)

In cutoff, the gate-to-source voltage is not greater than the threshold voltage, and the MOSFET is inactive.
In triode, the gate-to-source voltage is high enough to allow current flow from drain to source, and the nature of the induced channel is such that the magnitude of the drain current is influenced by the gate-to-source voltage and the drain-to-source voltage.
As the drain-to-source voltage increases, the triode region transitions to the saturation region, in which drain current is (ideally) independent of drain-to-source voltage and thus influenced only by the physical characteristics of the FET and the gate-to-source voltage.

MOSFET Channel Width (`W`) and Gate Length (`L`)

MOSFET width (W) and length (L) are crucial physical dimensions that determine its electrical characteristics, with W being the channel width and L being the gate length. The ratio of these dimensions, (W/L), is known as the aspect ratio and is directly related to parameters like transconductance and resistance, with a higher ratio generally leading to lower resistance and higher current flow. These dimensions are critical for circuit design, with the length often limited by the fabrication process, while the width can be adjusted to fine-tune performance.

Relationships/Formulas

The saturation-region relationship between gate-to-source voltage (V_GS) and drain current (I_D) is expressed as follows:

I_{D} = \frac{1}{2} μ_{n} C_{o x} \frac{W}{L} (V_{G S} - V_{threshold})^{2}

The transition to saturation mode occurs because the channel gets pinched off at the drain end. The “pinching off” isn’t the end of the influence exerted by the drain-to-source voltage. Further increases continue to affect the channel because the pinch-off point moves closer to the source.

The resistance of the channel is inversely proportional to its width-to-length ratio; reducing the length leads to decreased resistance and hence higher current flow. Thus, channel-length modulation means that the saturation-region drain current will increase slightly as the drain-to-source voltage increases.

So we need to modify the saturation-region drain-current expression/formula to account for channel-length modulation. We do this by incorporating the incremental channel-length reduction into the original expression:

I_{D} = \frac{1}{2} μ_{n} C_{o x} \frac{W}{L - Δ L} (V_{G S} - V_{T H})^{2}

(Note how the subtraction will reduce the denominator of the W/L term, leading to higher current.) By assuming that the incremental change is much less than the length of the physical channel (i.e., the distance between the source and drain regions), we can rearrange this as follows:

I_{D} = \frac{1}{2} μ_{n} C_{o x} \frac{W}{L} (V_{G S} - V_{T H})^{2} (1 + \frac{Δ L}{L})

Now we just need to come up with a parameter that accounts for how a certain semiconductor process technology responds to changes in the drain-to-source voltage. How about we call this parameter lambda (λ), such that

\frac{Δ L}{L} = λ V_{D S}

This brings us to our channel-length-modulation-compliant expression for saturation-region drain current:

I_{D} = \frac{1}{2} μ_{n} C_{o x} \frac{W}{L} (V_{G S} - V_{T H})^{2} (1 + λ V_{D S})

This modified drain-current expression is a first-order approximation that is reasonably accurate for FETs with channel length greater than, say, 2 µm. As the channel length decreases, so-called short-channel effects become more influential, and thus the above expression (which does not account for short-channel effects) becomes less valid.

Note also that the above expression incorporates the assumption that ΔL is much less than L; this assumption becomes less justifiable with shorter channel lengths, and indeed, researchers have developed a more sophisticated channel-length-modulation model for use with simulations involving modern short-channel devices.

Power MOSFET's

(From Toshiba)

Since Power MOSFETs operate principally as majority-carrier devices, they are not affected by minority carriers. This is in contrast to the situation with minority-carrier devices such as bipolar transistors where such effects create more serious design problems. Also, the input impedance of power MOSFETs is basically higher than that of junction FETs.

Even though power MOSFETs excel in speed, in the beginning of their development, it was thought that achieving low on-state resistance, high breakdown voltage and high power would be difficult. In recent years, however, we have witnessed major improvement in the performance of power MOSFETs with the prevalence of a planar gate double diffusion structure, followed by trench gate and superjunction (SJ) structures. Power MOSFETs with these new structures deliver higher speed, lower on-state resistance, and higher breakdown voltage. Today, power MOSFETs are widely used as switching devices in commercial, industrial, automotive and other applications.

Power MOSFET Characteristics

The general characteristics of power MOSFETs are:

Basically, MOSFETs are majority-carrier devices and operationally different from bipolar transistors that are minority-carrier devices.
While bipolar transistors are current-controlled devices, MOSFETs are voltage-controlled devices that are controlled by gate-source voltage.
Since MOSFETs are majority-carrier devices, they do not suffer delay due to the carrier storage effect, making high frequency switching possible.
In bipolar transistors, current concentrates in the high voltage region, making them vulnerable to junction destruction due to secondary breakdown. Operating conditions are de-rated as necessary to prevent junction destruction. In contrast, power MOSFETs are much more immune to secondary breakdown and therefore more rugged. However, the electrical characteristics of recent MOSFET devices should be carefully examined as some of them are vulnerable to secondary breakdown.
Since power MOSFETs have a positive temperature coefficient of on-state resistance, RDS(ON) at high temperatures should be considered during thermal design

Power MOSFET Structure

Power MOSFETs can be broadly categorized according to their gate and drift structures.

Double diffusion MOS (D-MOS) structure: For the fabrication of D-MOS devices, channels are formed in a double diffusion process that provides high withstand voltage. The D-MOS process is well suited to increasing device density, making it possible to realize high performance power MOSFETs with low on-state resistance and low power loss.
Trench gate structure: The trench-gate process forms a vertical gate channel in the shape of a U groove in order to increase device density and thereby further reduce on-state resistance. The trench gate structure is employed to fabricate power MOSFETs with relatively low voltage.
Superjunction (SJ) structure: This structure has a drift region that consists of alternating p- and n-type semiconductor layers. This process overcomes the inherent limitations of the vertical silicon process used with conventional power MOSFETs and delivers extremely low on-state resistance. Compared to conventional power MOSFETs, the superjunction process provides significant improvement in the trade-off between VDSS (maximum drain-source voltage) and Ron∙A (normalized on-state resistance per specific area), and therefore helps to considerably reduce conduction loss.